Nitride-oxide sidewall spacer for salicide formation

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438306, H01L 2100

Patent

active

057473730

ABSTRACT:
A method of fabricating a MOSFET device structure, featuring a double insulator spacer, and improved source and drain engineering, has been developed. A silicon nitride--silicon oxide, double spacer, is used to prevent thinning of the insulator spacer, during a buffered hydrofluoric acid procedure, used prior to a metal deposition and metal silicide formation. A lightly doped source and drain region is formed prior to creation of the silicon oxide spacer, a medium doped source and drain region is formed prior to creation of the silicon nitride spacer, and a heavily doped source and drain region is formed following the creation of the silicon nitride spacer. This source and drain configuration increases device performance and reliability.

REFERENCES:
patent: 5411906 (1995-05-01), Johnson et al.
patent: 5498555 (1996-03-01), Lin
patent: 5518940 (1996-05-01), Hodate et al.
patent: 5518945 (1996-05-01), Bracchitta et al.

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