Reduced temperature contact/via filling
Reduced wafer warpage in semiconductors by stress...
Reducing copper line resistivity by smoothing trench and via...
Reducing damage to ulk dielectric during cross-linked...
Reducing reflectivity on a semiconductor wafer by annealing alum
Reducing reflectivity on a semiconductor wafer by annealing...
Reducing the migration of grain boundaries
Reducing wire erosion during damascene processing
Reducing wire erosion during damascene processing
Reduction of a feature dimension in a nano-scale device
Reduction of copper dewetting by transition metal deposition
Reduction of Cu line damage by two-step CMP
Reduction of lateral silicide growth in integrated circuit...
Reduction of plasma damage at contact etch in MOS integrated...
Reduction of punch-thru defects in damascene processing
Reduction of surface contamination in post-CMP cleaning
Reduction of surface defects on amorphous silicon grown by a...
Reduction of the shear stress in copper via's in organic...
Reduction of tungsten silicide resistivity by boron ion...
Reduction of via over etching for borderless contacts