Escalator code-based delay-locked loop apparatus and...
Event edge synchronization system and method of operation...
Exact frequency translation using dual cascaded sigma-delta...
Extended chip select reset apparatus and method
Fail-safe zero delay buffer with automatic internal reference
Fail-safe zero delay buffer with automatic internal reference
False lock detection mechanism for use in a delay locked...
False-lock-free delay locked loop circuit and method
Fast clock generator and clock synchronizer for logic derived cl
Fast clock generator and clock synchronizer for logic derived cl
Fast lock phase lock loop and method thereof
Fast lock scheme for phase locked loops and delay locked loops
Fast lock-in all-digital phase-locked loop with extended...
Fast measurement initialization for memory
Fast power-on detect circuit with accurate trip-points
Fast settling charge pump
Fast start-up processor clock generation method and system
Fast switching phase-locked loop
Fast-locking delay locked loop
Fast-locking digital phase locked loop