Nanosecond monolithic CMOS readout cell
Negative bias temperature instability correction technique...
Network switching system including a zero-delay output buffer
Noise reduction for phase locked loop
Noise reduction method and system for a multiple clock,...
Noise resistant reset circuit for a phase detector in a phase-lo
Noise suppression circuitry and method
Non-iterative signal synchronization
Non-quasistatic phase lock loop frequency divider circuit
Nonvolatile semiconductor integrated circuit having an address t
Normalization of apparent propagation delay