Half symbol delay calibration for phase window centering
Hard phase alignment of clock signals using asynchronous...
Hard phase alignment of clock signals with an oscillator...
Hard reset and manual reset circuit assembly
Hardware performance monitor (HPM) with variable resolution...
High bandwidth multi-phase clock selector with continuous...
High bandwidth phase locked loop (PLL)
High bandwidth phase locked loop (PLL) with feedback loop...
High bandwidth phase locked pool (PLL)
High frequency CMOS clock recovery circuit
High frequency system with duty cycle buffer
High frequency system with duty cycle buffer
High output impedance charge pump for PLL/DLL
High performance signal generation
High precision power-on-reset circuit with an adjustable...
High resolution delay line
High resolution digital loop circuit
High resolution digital loop circuit
High resolution digital phase locked loop with automatic recover
High resolution interleaved delay chain