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Selected: M

Method and apparatus for breakpoint analysis of computer...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Method and apparatus for broadcasting scan patterns in a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for broadcasting test patterns in a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for building an operating environment...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Method and apparatus for building and managing...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Method and apparatus for built in self-test of buffer...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for built-in self test of integrated circui

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Method and apparatus for built-in self-test (BIST) of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for built-in self-test of logic circuitry

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for built-in self-test of smart memories

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Method and apparatus for built-in self-test of smart memories

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent

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Method and apparatus for burn-in of semiconductor devices

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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Method and apparatus for burst error correction

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Method and apparatus for bus activity tracking

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Method and apparatus for bus hang detection and...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Method and apparatus for bus parameter optimization using...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Method and apparatus for cache tag mirroring

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent

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Method and apparatus for calculating a CRC remainder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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Method and apparatus for calculating checksums

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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Method and apparatus for calculating cyclic redundancy check...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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