Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent
1996-09-03
2000-07-04
Chung, Phung M.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
714724, G01R 3128
Patent
active
060853468
ABSTRACT:
A BIST function is provided in which both the routing area devoted to the test signals and the area devoted to the circuits required to implement the BIST routines are minimized, while also including the ability to test a plurality of embedded memories at full speed in parallel. Testing the memories at full speed both reduces test time and improves the quality of the testing.
REFERENCES:
patent: 5784323 (1998-07-01), Adams et al.
Ghukasyan Hovhannes
Kraus Lawrence
Lepejian Yervant David
Marandjian Hrant
Chung Phung M.
Credence Systems Corporation
LandOfFree
Method and apparatus for built-in self test of integrated circui does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for built-in self test of integrated circui, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for built-in self test of integrated circui will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1496644