Method and apparatus for built-in self-test of smart memories

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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Details

C714S722000

Reexamination Certificate

active

06226766

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
This invention relates generally to electronic circuits, and more particularly to a method and apparatus for built-in self-test of smart memories.
BACKGROUND OF THE INVENTION
Smart memories, or memories which appear externally as standard memory devices yet which contain on-chip processing capabilities, allow for implementation of massive parallel processing systems. As with all electronic circuits, however, the performance of such systems is dependent upon the reliability of each component within the system.
In parallel processing systems using smart memories, each of the smart memories forms an important component of the system that must operate reliably. Therefore, a need has arisen for a built-in self-test scheme for insuring the reliability of each smart memory. Furthermore, this built-in self-test scheme must operate quickly enough so as to not degrade the efficiency of the overall parallel processing system in which the smart memory resides.
SUMMARY OF THE INVENTION
In accordance with the teachings of the present invention, a self-testing smart memory is provided which substantially eliminates or reduces disadvantages and problems associated with prior smart memories. In particular, a smart memory is provided which includes a data RAM, a broadcast RAM, and a data path. Memory test circuitry within the smart memory is operable to write a pattern to the data RAM and the broadcast RAM and to compare the contents of the data RAM and the broadcast RAM with the pattern. Any failures in the RAM memory result in an indication that the smart memory failed the self-test. Furthermore, data path test circuitry within the smart memory is operable to test the functionality of the data path.
An important technical advantage of the present invention is the fact that a smart memory using the present invention can internally perform a self-test to determine its operability. Furthermore, this self-test, because it is performed internally, is performed quickly so as to maximize efficiency of a system using smart memories.


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Article by McCluskey, Edward J. entitled “Logic Design Principles” published by Prentice-Hall 1986. pp 458-459, 462-43, 468-471.

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