Techniques for enabling a 10BT active output impedance line...
Techniques for implementing hardwired decoders in...
Techniques for level shifting signals
Techniques for on-chip termination
Techniques for optimizing design of a hard intellectual...
Techniques for programming programmable logic array devices
Techniques for programming programmable logic array devices
Techniques for programming programmable logic array devices
Techniques for programming programmable logic array devices
Techniques for programming programmable logic array devices
Techniques for providing adjustable on-chip termination...
Techniques for providing adjustable on-chip termination...
Techniques for providing calibrated on-chip termination...
Techniques for providing calibrated on-chip termination...
Techniques for providing calibrated on-chip termination...
Techniques for providing calibrated parallel on-chip...
Techniques for providing flexible on-chip termination...
Techniques for providing increased flexibility to...
Techniques for providing multiple termination impedance...
Techniques for providing switchable decoupling capacitors...