Stored and combinational logic function generator without dedica
Stress mode circuit for an integrated circuit with on-chip volta
Structure and method for arithmetic function implementation in a
Structure and method for configuration of a field programmable g
Structure and method for dynamic control of output driver...
Structure and method for generating a clock enable signal in...
Structure and method for implementing hierarchical routing pools
Structure and method for loading narrow frames of data from a wi
Structure and method for loading wide frames of data from a narr
Structure and method for reading blocks of data from selectable
Structure and method for reduction of power consumption in...
Structure and method of alternating precharge in dynamic SOI...
Structure and method of repair of integrated circuits
Structure and method of repair of integrated circuits
Structure and methods for measurement of arbitration...
Structure for externally identifying an internal state of a semi
Structure for optionally cascading shift registers
Structure for reducing leakage current in submicron IC devices
Structure of controlled pipeline logic
Structured integrated circuit device