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Method for calibrating a driver and on-die termination of a...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

Reexamination Certificate

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Method for calibrating a driver and on-die termination of a...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

Reexamination Certificate

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Method for clock control of clocked full-rail differential...

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Reexamination Certificate

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Method for clock control of clocked half-rail differential...

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Reexamination Certificate

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Method for clock control of clocked half-rail differential...

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

Reexamination Certificate

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Method for clock control of clocked half-rail differential...

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

Reexamination Certificate

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Method for clock control of half-rail differential logic

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Reexamination Certificate

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Method for clock control of half-rail differential logic

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Reexamination Certificate

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Method for clocking charge recycling differential logic

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

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Method for compensating a threshold voltage of a neighbor bit

Electronic digital logic circuitry – Threshold

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Method for concurrently programming or accessing a plurality of

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...

Patent

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Method for contact pad isolation

Electronic digital logic circuitry – With test facilitating feature

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Method for controlling clock frequency of a digital logic semico

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Patent

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Method for controlling the impedance of a driver circuit

Electronic digital logic circuitry – Interface – Current driving

Patent

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Method for coupling logic blocks using low threshold pass...

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...

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Method for distributing clock signals to flip-flop circuits

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

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Method for elimination of parasitic bipolar action in...

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

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Method for extending lifetime reliability of digital logic...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization

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Method for extending lifetime reliability of digital logic...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Signal level or switching threshold stabilization

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Method for fabricating PLDs including multiple discrete...

Electronic digital logic circuitry – Multifunctional or programmable – Array

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