Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...
Patent
1997-09-17
1999-12-07
Tokar, Michael
Electronic digital logic circuitry
Multifunctional or programmable
Having details of setting or programming of interconnections...
326 39, G06F 738, H03K 19173, H03K 19177
Patent
active
059990147
ABSTRACT:
An improved method for concurrently programming in-system programmable logic devices (PLDs). More specifically, where within a plurality of serially connected PLDs, there are devices having different numbers of programmable memory cells, and devices whose memory cells require different wait periods to carry out programming, the method herein provides more optimum time efficiency and uses significantly less time overall for programming, erasing or reading back the PLDs. Also, the invention accommodates the implementation of retries to assure complete programming or erasing even when the initial attempt is not entirely successful. The method provides steps for accommodating PLDs with different wait times by bypassing fully programmed devices and speeding up programming times after smaller and slower devices are programmed and larger and faster devices are still not fully programmed. The method employs the step of altering the program implementation from concurrent to sequential programming to optimize retry efficiency.
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Jacobson Neil G.
Murphy Matthew T.
Shaw, Jr. Philip M.
Tokar Michael
Wamsley Patrick
Xilinx , Inc.
Young Edel M.
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