DPRIO for embedded hard IP

DRAM memory cell for programmable logic devices

Driver circuitry for programmable logic devices with...

Dual-function method and circuit for programmable device

Dual-purpose shift register

Dynamic logic interconnect speed-up circuit

Dynamically configurable logic gate using a non-linear element

Dynamically controlled output multiplexer circuits in a...

Efficient 4:1 multiplexer for programmable chips

Efficient 4:1 multiplexer for programmable chips

Efficient implementations of the threshold-2 function

Efficient tile layout for a programmable logic device

Efficient use of spare gates for post-silicon debug and...

Electrical circuit for setting internal chip functions without d

Electrically-programmable interconnect architecture for...

Electronic circuit with array of programmable logic cells

Electronic circuit with array of programmable logic cells

Electronic circuit with array of programmable logic cells

Electronic system organised as an array of cells

Embedding memory within tile arrangement of a configurable IC