I/O cell configuration for multiple I/O standards

I/O cell configuration for multiple I/O standards

I/O interface cell for use with optional pad

IC having programmable digital logic cells

IC output signal path with switch, bus holder, and buffer

IC with dual input output memory buffer

Implementing a priority function using ripple chain logic

Implementing conditional statements in self-timed logic...

Incrementer based on carry chain compression

Innovated technique to reduce memory interface write mode...

Input buffer with selectable threshold and hysteresis option

Input buffer with selectable threshold and hysteresis option

Input circuit for mode setting

Input pad having an enable terminal employed in a low-current-co

Input/output architecture for efficient configuration of...

Integrate circuit chip with magnetic devices

Integrated circuit containing multi-state restore circuitry...

Integrated circuit device

Integrated circuit device programming with partial power

Integrated circuit device, electronic equipment, and method...