Data input/output circuit included in semiconductor memory...
Data monitoring for single event upset in a programmable...
Data transfer control circuitry including FIFO buffers
Datapath global routing using flexible pins for side exiting...
Decoder structure and method for FPGA configuration
Device and data processing method employing the device
Device and data processing method employing the device
Device and method of configuring a device having...
Device for setting operating parameters in a plurality of...
Differential interconnection circuits in programmable logic...
Differential interconnection circuits in programmable logic...
Digital circuit
Digital configurable macro architecture
Digital configurable macro architecture
Digital electronic circuit with low power consumption
Distributed bus structure
Distributed random access memory in a programmable logic device
Distribution of signals throughout a spine of an integrated...
Double data rate input and output in a programmable logic...
Download sequencing techniques for circuit configuration data