Uni-sized clock buffers
Unified local clock buffer structures
Using a timing strobe for synchronization and validation in...
Using cascode transistors having low threshold voltages
Variable pulse width and pulse separation clock generator
Variable virtual ground domino logic with leakage control
Vector logic method and dynamic mousetrap logic gate for a self-
Virtual ground circuit
Voltage controlled oscillation circuit
Voltage-controlled delay line with reduced timing errors and...
Wave propagation logic
Wide dynamic “NOR” gate
Zero clock delay metastability filtering circuit
Zipper domino carry generate cell for fast adders