Output device for static random access memory

Output driver having reduced power consumption and layout area

Output driver robust to data dependent noise

Output synchronization-free, high-fanin dynamic NOR gate

Output synchronization-free, high-fanin dynamic NOR gate

P-domino output latch

P-domino register

Partial swing low power CMOS logic circuits

Phase-controlled source synchronous interface circuit

Pipeline structure using positive edge and negative edge flip-fl

Pipeline-based circuit with a postponed clock-gating...

Pipelined clock distribution for self resetting CMOS circuits

PMOS charge-sharing prevention device for dynamic logic circuits

Polyphase clock generation circuit

Power conserving CMOS semiconductor integrated circuit

Power reduction circuits and systems for dynamic logic gates

Power saving clock buffer

Power supply switching at circuit block level to reduce...

Power-saving dynamic circuit

Pre-charge triggering to increase throughput by initiating regis