Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor
Reexamination Certificate
2007-07-24
2007-07-24
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
Field-effect transistor
C326S098000, C326S093000
Reexamination Certificate
active
11065178
ABSTRACT:
Leakage currents at IC inputs can be avoided while the IC is disabled by providing a switch that is responsive to deactivation of an enable input to isolate functional circuitry of the IC from one of the power supply nodes of the IC. This eliminates power supply current while the IC is disabled. Further unwanted current flow can be avoided while the IC is disabled by providing a switch that is responsive to the enable input for selectively connecting and disconnecting the base of a reference voltage transistor to and from the transistor's grounded collector, which collector is defined by the substrate of the IC. Disconnection of the base from the grounded substrate/collector eliminates base current and thus prevents emitter-to-collector current flow through the transistor when the IC is disabled.
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Dae Woon Kang et al., “A Low Power Methodology for Portable Electronics”, Department of Electrical and Computer Engineering, Northeastern University, No date.
National Semiconductor Corporation
Tan Vibol
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