Clock synchronization of multiprocessor systems
Clock synchronization with removal of clock skews through...
Clock system for multiple component system
Clock system for multiple component system including module...
Clock tree circuit and semiconductor memory device using the...
Clock-signal generation device, communication device, and...
Clock-signal generation device, communication device, and...
Clock-synchronized memory device and the scheduler thereof
Clocking an I/O buffer, having a selectable phase difference...
Clocking architecture to compensate a delay introduced by a...
Clocking architecture using a bidirectional clock port
Clocking scheme for digital signal processor system
Clocking scheme for programmable logic device
Clocking system for microcontrollers
Clocking system including a clock controller that uses...
Clocking system including a clock controller that uses...
Cloning protection scheme for a digital information playback dev
Closed loop voltage control using adjustable delay lines
Closed-loop control for performance tuning
Closed-loop, supply-adjusted RAM memory circuit