Electrical computers and digital processing systems: support – Clock – pulse – or timing signal generation or analysis – Multiple or variable intervals or frequencies
Reexamination Certificate
2006-06-27
2006-06-27
Butler, Dennis M. (Department: 2115)
Electrical computers and digital processing systems: support
Clock, pulse, or timing signal generation or analysis
Multiple or variable intervals or frequencies
C713S322000, C713S600000
Reexamination Certificate
active
07069461
ABSTRACT:
The supply voltage of a memory system is adjusted in response to changes in the frequency of the clock signal. The memory system measures a time from when data becomes valid on the output of a memory to the next clock edge to determine a timing value. When the clock frequency changes from a first frequency to a second frequency, the timing value changes from a first value to a second value. The magnitude of the supply voltage is changed to return the timing value to the first value.
REFERENCES:
patent: 5602882 (1997-02-01), Co et al.
patent: 6262611 (2001-07-01), Takeuchi
patent: 6317008 (2001-11-01), Gabara
patent: 6351165 (2002-02-01), Gregorian et al.
patent: 6498512 (2002-12-01), Simon et al.
patent: 6633987 (2003-10-01), Jain et al.
patent: 6720808 (2004-04-01), Chan
patent: 6721892 (2004-04-01), Osborn et al.
patent: 6889331 (2005-05-01), Soerensen et al.
patent: 2004/0199803 (2004-10-01), Suzuki et al.
Dragan Maksimovic, Bruno Kranzen, Sandeep Dhar and Ravindra Ambatipudi, U.S. Appl. No. 10/053,226, filed Jan. 19, 2002, entitled “An Adaptive Voltage Scaling Digital Processing Component and Method of Operating the Same”.
Bruno Kranzen and Dragan Maksimovic, U.S. Appl. No. 10/053,227, filed Jan. 19, 2002, entitled “Adaptive Voltage Scaling Clock Generator for Use in a Digital Processing Component and Method of Operating the Same”.
Dragan Maksimovic and Sandeep Dhar, U.S. Appl. No. 10/053,828, filed Jan. 19, 2002, entitled “System for Adjusting a Power Supply Level of a Digital Processing Component and Method of Operating the Same”.
Dragan Maksimovic, Ravindra Ambatipudi, Sandeep Dhar and Bruno Krazen, U.S. Appl. No. 10/053,228, filed Jan. 19, 2002, entitled “An Adaptive Voltage Scaling Power Supply for Use in a Digital Processing Component and Method of Operating the Same”.
James T. Doyle and Dragan Maksimovic, U.S. Appl. No. 10/160,428, filed Mar. 26, 2002, entitled “Method and System for Minimizing Power Consumption in Mobile Devices Using Cooperative Adaptive Voltage and Threshold Scaling”.
Dragan Maksimovic and James Thomas Doyle, U.S. Appl. No. 10/166,822, filed Jun. 10, 2002, entitled “Serial Digital Communication Superimposed on a Digital Signal Over a Single Wire”.
Dragan Maksimovic and Sandeep Dhar, U.S. Appl. No. 10/236,482, filed Sep. 6, 2002, entitled “Method and System for Providing Self-Calibration for Adaptively Adjusting a Power Supply Voltage in a Digital Processing System”.
Dragan Maksimovic and Sandeep Dhar, U.S. Appl. No. 10/272,027, filed Oct. 15, 2002, entitled “All Digital Power Supply System and Method That Provides a Substantially Constant Supply Voltage Over Changes in PVT Without a Band Gap Reference Voltage”.
Wai Cheong Chan and Donald Kevin Cameron, U.S. Appl. No. 10/324,997, filed Dec. 18, 2002, entitled “System and Method for Signal Delay in an Adaptive Voltage Scaling Slack Detector”.
Mark F. Rives, U.S. Appl. No. 10/246,971, filed Sep. 19, 2002, entitled “Power Supply System and Method that Utilizes an Open Loop Power Supply Control”.
Jim Doyle and Bill Broach, Small Gains in Power Efficiency Now, Bigger Gains Tomorrow [online]. Jul. 9, 2002 [retrieved on Feb. 1, 2003]. Retrieved from the Internet: <URL: http://www.commsdesign.com/design—corner/OEG20020709S0022>. pp. 1-5.
Robert W. Erickson and Dragan Maksimovic,Fundamentals of Power Electronics, Second Edition, Kluwer Academic Publishers, 2001, p. 333.
Krisztian Flautner, Steven Reinhardt and Trevor Mudge, Automatic Performance Setting for Dynamic Voltage Scaling, Wireless Networks, vol. 8, Issue 5, Sep. 2002, pp. 507-520, and Citation, pp. 1-3, [online]. [retrieved on Feb. 2, 2003]. Retrieved from the Internet: <URL: http://portal.acm.org/citation.cfm?id=582455.582463&coll=portal&dl=ACM&idx=J804&p . . . >.
Krisztian Flautner, Steven Reinhardt and Trevor Mudge, Automatic Performance Setting for Dynamic Voltage Scaling [online]. May 30, 2001, [retrieved on Feb. 2, 2003]. Retrieved from the Internet: <URL: http://www.eecs.umich.edu/˜tnm/papers/mobicom01.pdf>. pp. 1-12.
Texas Instruments, “Synchronous-Buck PWM Controller With NMOS LDO Controller”, TPS5110, SLVS025A- Apr. 2002, Revised Jun. 2002.
Intel XScale Core, Developer's Manual, Dec. 2000, [online], [retrieved on Feb. 2, 2002]. Retrieved from the Internet: <URL: http://developer.intel.com/design/intelxscale/27347301.pdf>. pp. 1-1 through B-1.
Kaushik Roy, Leakage Tolerant Circuits, Sub-Threshold Logic [online]. No date, [retrieved by inventor approximately Nov. 1, 2002]. Retrieved from the Internet:<URL:http://www.ece.purdue.edu/˜visi/seven.pdf>. pp. 1-43.
Benjamin James Patella, “Implementation of a High Frequency, Low-Power Digital Pulse Width Modulation Controller Chip”, Thesis Submitted to Graduate School of University of Colorado in Department of Electrical and Computer Engineering, 2000, pp. 1-272.
John G. Maneatis, “Low-Jitter Process-Independent DLL and PLL Based on Self-Biased Techniques”, 1996 ISCCC 8.1 Presentation Slides, 3 sheets, IEEE Journal of Solid-State Circuits, vol. 31, No. 11, Nov. 1996, pp. 1723-1732.
U.S. Appl. No. 10/053,858, filed Jan. 19, 2002, Maksimovic et al.
U.S. Appl. No. 10/106,428, filed Mar. 26, 2002, Doyle et al.
U.S. Appl. No 10/272,027, filed Oct. 15, 2002, Doyle et al.
Chan Wai Cheong
Doyle James Thomas
Liu Hsing-Chien Roy
Mortensen Gordon
Poplevine Pavel
Butler Dennis M.
National Semiconductor Corporation
Pickering Mark C.
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