Clocking architecture using a bidirectional clock port

Details Clocking architecture using a bidirectional clock port Clocking architecture using a bidirectional clock port

2005-10-26

2009-06-30

Cao, Chun (Department: 2115)

Electrical computers and digital processing systems: support

Clock control of data processing system, component, or data...

C713S500000, C711S167000, C365S233110, C365S233120

Reexamination Certificate

active

07555670

ABSTRACT:
Embodiments of the invention are generally directed to systems, methods, and apparatuses for a clocking architecture using a bidirectional clock. In an embodiment, a chip includes a bidirectional clock port capable of being statically configured to receive or to transmit a reference clock. In one embodiment, the chip includes a first port to receive data and a second port, wherein the chip repeats at least a portion of the data that it receives on the first port to a transmitter at the second port. Other embodiments are described and claimed.

REFERENCES:
patent: 5305278 (1994-04-01), Inoue
patent: 5546023 (1996-08-01), Borkar et al.
patent: 5604450 (1997-02-01), Borkar et al.
patent: 5661692 (1997-08-01), Pinkham et al.
patent: 5963464 (1999-10-01), Dell et al.
patent: 6226729 (2001-05-01), Stevens et al.
patent: 6373289 (2002-04-01), Martin et al.
patent: 6437601 (2002-08-01), Borkar et al.
patent: 6493250 (2002-12-01), Halbert et al.
patent: 6510503 (2003-01-01), Gillingham et al.
patent: 6536025 (2003-03-01), Kennedy et al.
patent: 6570944 (2003-05-01), Best et al.
patent: 6658509 (2003-12-01), Bonella et al.
patent: 6697888 (2004-02-01), Halbert et al.
patent: 6742098 (2004-05-01), Halbert et al.
patent: 6747474 (2004-06-01), Borkar et al.
patent: 6832325 (2004-12-01), Liu
patent: 6847617 (2005-01-01), Borkar et al.
patent: 6871253 (2005-03-01), Greeff et al.
patent: 6898726 (2005-05-01), Lee
patent: 7043652 (2006-05-01), Matsui
patent: 7043657 (2006-05-01), Yang et al.
patent: 7155627 (2006-12-01), Matsui
patent: 7180821 (2007-02-01), Ruckerbauer et al.
patent: 2002/0101294 (2002-08-01), Wright
patent: 2002/0112119 (2002-08-01), Halbert et al.
patent: 2002/0144173 (2002-10-01), Jeddeloh
patent: 2003/0231043 (2003-12-01), Ibuka
patent: 2005/0146980 (2005-07-01), Mooney et al.
patent: 0 862 119 (1998-09-01), None
patent: 07 107105 (1995-04-01), None
patent: 11 204649 (1999-07-01), None
patent: WO 99/31803 (1999-06-01), None
patent: WO 9931803 (1999-06-01), None
PCT, International Search Report and Written Opinion of the International Searching Authority, Application No. PCT/US2006/041991, mailed Aug. 14, 2007.
“Memory Technology Evolution: an Overview of System Memory Technologies,” Technology Brief, 5th edition, Hewlett-Packard Development Company, 17 pages.
International Preliminary Report on Patentability; PCT/US2006/041991; Report issued Apr. 29, 2008; 9 pages.
German Office Action, Patent Application No.: DE 11 2006 002 559T5, ; Issued Oct. 30, 2008; 4 pages.

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