Clock synchronization with removal of clock skews through...

Details Clock synchronization with removal of clock skews through... Clock synchronization with removal of clock skews through...

2005-10-18

2005-10-18

Browne, Lynne H. (Department: 2116)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

Correction for skew, phase, or rate

C713S400000

Reexamination Certificate

active

06957357

ABSTRACT:
A method, computer program product, and data processing system for estimating and correcting the amount of clock skew in end-to-end network timing measurements is disclosed. Measured delays are combined with their time of measurement to create ordered pairs. These ordered pairs represent points within a Cartesian plane. The convex hull of these points is determined, and an optimal line segment from the resulting polygon is selected and extrapolated to create an affine function estimating clock skew over time. The optimal line segment of the polygon is one that optimizes a selected objective function. The objective function is selected so as to be an appropriate measurement of the accuracy of the resulting linear function as an estimate of the actual clock skew.

REFERENCES:
patent: 5959568 (1999-09-01), Woolley
patent: 6327274 (2001-12-01), Ravikanth
patent: 6539490 (2003-03-01), Forbes et al.
patent: 6661810 (2003-12-01), Skelly et al.

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