Signal bus, multilevel input interface and information...

Signal processing circuit for accessing a memory based on...

Signal transmission system having a timing adjustment circuit

Signals crossing multiple clock domains

Skew pointer generation

Software power control of circuit modules in a shared and...

Software power control of circuit modules in a shared and...

Strategy to verify asynchronous links across chips

Symmetric multiprocessing system with unified environment...

Synchronous dynamic random access memory devices that...

Synchronous pipeline with normally transparent pipeline stages

Synchronous/asynchronous interface circuit and electronic...

Synchronous/asynchronous interface circuit and electronic...

System and method for a family of digital subscriber line...

System and method for adjusting execution frequency of a...

System and method for multi-input wake up in a...

System and method for over-clocking detection of a processor...

System and method for power saving delay locked loop control...

System and method for processing an instruction according to...

System and method for providing a write strobe signal to a...