Signals crossing multiple clock domains

Details Signals crossing multiple clock domains Signals crossing multiple clock domains

2005-02-22

2008-12-23

Patel, Nitin C (Department: 2116)

Electrical computers and digital processing systems: support

Clock control of data processing system, component, or data...

C713S400000, C713S500000, C345S558000, C714S039000, C375S372000

Reexamination Certificate

active

07469356

ABSTRACT:
Methods, systems, and circuits are provided for signals crossing multiple clock domains. One circuit includes a number of different clock domains located on different portions of the ASIC. A number of input/output (I/O) ports are provided to couple signals to and from the ASIC. The circuit includes means for moving internal signals from a subset of the number of different clock domains of multiple frequencies to a different clock domain for monitoring, observation, counting, and debug.

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