Signal processing circuit for accessing a memory based on...

Details Signal processing circuit for accessing a memory based on... Signal processing circuit for accessing a memory based on...

2007-12-12

2010-11-16

Du, Thuan N (Department: 2116)

Electrical computers and digital processing systems: support

Clock control of data processing system, component, or data...

C713S503000, C711S167000

Reexamination Certificate

active

07836327

ABSTRACT:
A delay time of a reference clock CLK is changed to generate a memory control clock CLKd, a data value output from a write data generating section is written in a memory based on the memory control clock CLKd, while successively changing the delay time of the memory control clock CLKd with respect to the reference clock CLK, the data value written in the memory is read, and the delay time suitable for access to the memory is selected from the delay time of the memory control clock CLKd with respect to the reference clock CLK based on a comparison result of the data values.

REFERENCES:
patent: 5608896 (1997-03-01), Vogley
patent: 7085905 (2006-08-01), Chao
patent: 7257725 (2007-08-01), Osaka et al.
patent: 7444535 (2008-10-01), Hsieh et al.
patent: 7519788 (2009-04-01), LaBerge

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