Electrical computers and digital processing systems: support – Clock control of data processing system – component – or data...
Reexamination Certificate
2006-06-20
2006-06-20
Lee, Thomas (Department: 2115)
Electrical computers and digital processing systems: support
Clock control of data processing system, component, or data...
C711S100000
Reexamination Certificate
active
07065669
ABSTRACT:
A method and apparatus is provided for that includes an improved special function register (SFR) access scheme by using a clock tree distribution process. In accordance with an exemplary embodiment, a conditional SFR write strobe signal may be used to trigger the SFR registers. A clock tree distribution process may be used to achieve significantly higher system speed. When balancing the clock network of the system, the clock leaf of the flip-flop or other circuit element that generates the SFR write strobe signal may be “advanced” by connecting the circuit element directly to the clock root. In addition, the SFR write strobe signal distribution may be balanced as a separate clock tree with minimum insertion delay.
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Cheung Hugo
Chiu Terence
Yuan Lu
Brady III W. James
Connolly Mark
Lee Thomas
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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