Bit-slice processing unit having M CPU's reading an N-bit width
Block-based branch target buffer
Bossless architecture and digital cell technology for...
Boundary synchronization mechanism for a processor of a...
Branch and return on blocked load or store
Branch control memory
Branch encoding before instruction cache write
Branch history guided instruction/data prefetching
Branch history information writing delay using counter to...
Branch instruction control apparatus and control method
Branch instruction execution control apparatus
Branch instruction for processor with branching dependent on...
Branch instruction for processor with branching dependent on...
Branch instruction handling in a self-timed marking system
Branch instruction having different field lengths for...
Branch instruction mechanism for processor
Branch instruction prediction method
Branch instructions with decoupled condition and address
Branch lookahead prefetch for microprocessors
Branch lookahead prefetch for microprocessors