Electrical computers and digital processing systems: processing – Instruction decoding – Predecoding of instruction component
Reexamination Certificate
2005-02-03
2009-02-03
Kim, Matt (Department: 2184)
Electrical computers and digital processing systems: processing
Instruction decoding
Predecoding of instruction component
C712S237000, C712S239000, C712S233000
Reexamination Certificate
active
07487334
ABSTRACT:
Method, system and computer program product for determining the targets of branches in a data processing system. A method for determining the target of a branch in a data processing system includes performing at least one pre-calculation relating to determining the target of the branch prior to writing the branch into a Level 1 (L1) cache to provide a pre-decoded branch, and then writing the pre-decoded branch into the L1 cache. By pre-calculating matters relating to the targets of branches before the branches are written into the L1 cache, for example, by re-encoding relative branches as absolute branches, a reduction in branch redirect delay can be achieved, thus providing a substantial improvement in overall processor performance.
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Patterson et al., Computer Organization and Design, 2005, Morgan Kaufmann, 3rd, pp. 330-340.
Konigsburg Brian R.
Le Hung Qui
Levitan David Stephen
Ward, III John Wesley
Glanzman Gerald H.
International Business Machines - Corporation
Kim Matt
Roberts-Gerhardt Diana L.
Tseng Cheng-Yuan
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