Branch instruction execution control apparatus

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Scoreboarding – reservation station – or aliasing

Reexamination Certificate

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C712S239000

Reexamination Certificate

active

06851043

ABSTRACT:
An information processing device contains a branch instruction execution control apparatus including a branch reservation station unit as a stack waiting for a process. The branch reservation station unit generates an entry storing a branch or data required to process the branch if an instruction is decoded, and it is determined that the instruction is a branch instruction or a process is required for a branch. With the configuration, in the information processing device for executing sequentially given instructions, a process of a sequence of instructions containing a branch instruction can be performed at a high speed to process the branch instruction in an order different from an order specified by a program.

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Diep et al., “Performance Evaluation of the PowerPC 620 Microarchitecture”, Proceeding of the 22nd Annual International Symposium on Computer Architecture, ACM, 1995, pp. 163-174.*
Notice of Rejection Grounds, Patent Application No. H10-358771, Reference No. 9804168, Dispatch No. 030640, Date Dispatched Feb. 3, 2004, pp. 1-4.

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