PROCESSOR, MULTIPROCESSOR SYSTEM AND METHOD FOR...
Program controlled embedded-DRAM-DSP architecture and methods
Program controlled embedded-DRAM-DSP having improved...
Programmable 1-bit data processing arrangement
Re-fetch of long operand buffered remainder after cache line...
Reading a selected register in a series of computational...
Register move operations
Register transfer unit for electronic processor
Replaying memory operation assigned a load/store buffer...
Resuming thread to service ready port transferring data...
Risc processor using register codes for expanded instruction...
Run-ahead program execution with value prediction
Scalable processor
Scheduling thread upon ready signal set when port transfers...
Self-synchronous transfer control circuit and data driven...
Sending both a load instruction and retrieved data from a...
Sequencer unit with instruction buffering
Shared register architecture for a dual-instruction-set CPU to f
Sign generation bypass path to aligner for reducing signed...
Signal processing device and method for supplying a signal...