Pipelined processor and method using a profile register...

Details Pipelined processor and method using a profile register... Pipelined processor and method using a profile register...

2005-04-12

2005-04-12

Ellis, Richard L. (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

Branching

C712S227000, C714S047300, C717S158000

Reexamination Certificate

active

06880072

ABSTRACT:
A pipeline processor having an exception program counter chain generates a return address in the exception program counter chain for an executing instruction. The return address is the point at which instruction execution should resume after an exception handler routine runs if the executing instruction incurs an exception. The return address is stored into a profiling register if and when the corresponding instruction completes execution. The profiling register is periodically sampled and a statistical profile is built of instructions executed in the processor by using the return addresses sampled. A sampled return address is identified as a branch delay instruction and included in the statistical profile if the sampled return address is that of a branch instruction which immediately precedes a branch delay instruction.

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James Larus, “Basic Block Profiling Isn't Always Accurate”, http://compilers.iecc.com/comparch/article/93-03-024, Mar. 8th, 1993.

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