Pre-prefetching target of following branch instruction based...

Electrical computers and digital processing systems: processing – Processing control – Branching

Reexamination Certificate

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Details

C712S207000, C712S238000, C712S240000

Reexamination Certificate

active

06912650

ABSTRACT:
An instruction control apparatus, and method, used with a device including a cache memory, a lower memory, an instruction fetch device issuing an instruction fetch request for a target of a first branch instruction to the cache memory, and an instruction control device processing a instruction sequence stored in the cache memory. The apparatus and method pre-prefetch a target instruction sequence for a target of a second branch instruction. A predetermined instruction sequence based on a past history is preliminarily transferred from the lower memory to the cache memory when the target instruction sequence for the target of the first branch instruction is not in the cache memory.

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