Method and apparatus for branch prediction based on branch...

Electrical computers and digital processing systems: processing – Processing control – Branching

Reexamination Certificate

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C712S233000, C712S237000, C712S239000, C712S240000

Reexamination Certificate

active

10394820

ABSTRACT:
Methods and apparatus are provided for branch prediction in a digital processor. A method includes providing a branch target buffer having a tag array and a data array, wherein each entry in the tag array provides an index to a corresponding entry in the data array, storing in a selected entry in the tag array information representative of a branch target of a current branch instruction, storing in a corresponding entry in the data array information representative of a branch target of a next branch instruction, and providing the information representative of the branch target of the next branch instruction in response to a match to an entry in the tag array. The information representative of the branch target of the next branch instruction may include a taken branch target address of the next branch instruction and an offset value. The offset value may represent an address of a next sequential instruction following the next branch instruction.

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Jackson, R.T. and F.O. Karim, Branch Anticipation and Prediction Algorithm, Dec. 1992, IBM Technical Disclosure Bulletin, vol. 35, No. 7, p. 73-74.

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