Electrical computers and digital processing systems: processing – Processing control – Branching
Reexamination Certificate
2011-04-19
2011-04-19
Kindred, Alford W (Department: 2181)
Electrical computers and digital processing systems: processing
Processing control
Branching
Reexamination Certificate
active
07930525
ABSTRACT:
A novel trace cache design and organization to efficiently store and retrieve multi-path traces. A goal is to design a trace cache, which is capable of storing multi-path traces without significant duplication in the traces. Furthermore, the effective access latency of these traces is reduced.
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Friendly, D., Patel, S., and Patt, Y., “Alternative Fetch and Issue Policies for the Trace Cache Fetch Mechanism”, In Proceedings of the 30th International Symposium on Microarchitecture, Dec. 1997.
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Jacobson, Q., Rotenberg, E., and Smith, J. E., “Path-based Next Trace Prediction”, In Proceedings of the 30th International Symposium on Microarchitecture, Dec. 1997.
Rasche Galen A.
Rivers Jude A.
Srinivasan Vijayalakshmi
Ference & Associates LLC
Geib Benjamin P
International Business Machines - Corporation
Kindred Alford W
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