Field programmable processor using dedicated arithmetic...

File replication methods and apparatus for reducing port...

Flag bits evaluation for multiple vector SIMD channels...

Flexible results pipeline for processing element

Floating-point unit which utilizes standard MAC units for...

General base state assignment for optimal massive parallelism

General purpose programmable accelerator board

Heterogeneous multi-core processor having dedicated...

Hub/router for communication between cores using cartesian...

Hybrid hypercube/torus architecture

Hypercomputer

Hypercomputer

IC containing matrices of plural type operation units with...

Image-processing processor

Independently non-homogeneously dynamically reconfigurable two d

Indirect rotator graph network

Information processing apparatus for entertainment system...

Information processing unit, information processing...

Input/output support for processing in a mesh connected...

Integrated circuit for executing software programs