Hub/router for communication between cores using cartesian...

Details Hub/router for communication between cores using cartesian... Hub/router for communication between cores using cartesian...

2006-08-01

2006-08-01

Pan, Daniel H. (Department: 2183)

Electrical computers and digital processing systems: processing

Processing architecture

Array processor

C712S225000, C716S030000

Reexamination Certificate

active

07085913

ABSTRACT:
A method and structure for an integrated circuit is disclosed. The invention includes a plurality of logic cores, a plurality of local hubs connected to said logic cores, and a plurality of global hubs connected to said local hubs. The local hubs and the global hubs transfer data between the logic cores.

REFERENCES:
patent: 5168572 (1992-12-01), Perkins
patent: 5253248 (1993-10-01), Dravida et al.
patent: 5495589 (1996-02-01), Mackenthun et al.
patent: 5613146 (1997-03-01), Gove et al.
patent: 5687325 (1997-11-01), Chang
patent: 5808899 (1998-09-01), Scepanovic et al.
patent: 5838683 (1998-11-01), Corley et al.
patent: 5878265 (1999-03-01), Hartmann
patent: 5898692 (1999-04-01), Dunning et al.
patent: 6092174 (2000-07-01), Roussakov
patent: 6115391 (2000-09-01), Sokol
patent: 6145072 (2000-11-01), Shams et al.
patent: 6147991 (2000-11-01), Rogers
patent: 6226735 (2001-05-01), Mirsky
patent: 6247161 (2001-06-01), Lambrecht et al.
patent: 6275975 (2001-08-01), Lambrecht et al.

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