Hypercomputer

Details Hypercomputer Hypercomputer

2006-05-23

2006-05-23

Treat, William M. (Department: 2183)

Electrical computers and digital processing systems: processing

Processing architecture

Array processor

Reexamination Certificate

active

07051185

ABSTRACT:
A computer system comprising a first block which includes multiple processing subsystem, a second block which includes multiple processing subsystem, a third block which includes multiple processing subsystem, a fourth block which includes multiple processing subsystem, a first communication and processing subsystem that interconnects subsystem of the first and second blocks, a second communication and processing subsystem that interconnects subsystem of the third and fourth blocks, a third communication and processing subsystem that interconnects subsystem of the first and fourth blocks; and a fourth communication and processing subsystem that interconnects subsystem of the second and third blocks, wherein respective subsystem include a respective processing elements and a respective communication and processing unit interconnecting the respective processing elements.

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