Fixed shift amount variable length instruction stream...

Functional-level instruction-set computer architecture for...

High performance adder for multiple parallel add operations

Immediate and displacement extraction and decode mechanism

Information processing apparatus provided with an optimized...

Instruction code conversion apparatus creating an...

Instruction code conversion unit and information processing...

Instruction length determination device and method using...

Instruction set extension using prefixes

Instruction translation system and method achieving...

Intra-instruction fusion

Length decoder for variable length data

Load-shift carry instruction

Massively parallel decoding and execution of variable-length...

Mechanism for extending the number of registers in a...

Mechanism for extending the number of registers in a...

Merging narrow register for resolution of data dependencies...

Method and apparatus for computing a packed absolute...

Method and apparatus for efficient loading and storing of...

Method and apparatus for generating a microinstruction responsiv