Instruction set extension using prefixes

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...

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G06F 930

Patent

active

060147350

ABSTRACT:
The present invention discloses a method and apparatus for encoding an instruction in an instruction set which uses a prefix code to qualify an existing opcode of an existing instruction. An opcode and an escape code are selected. The escape code is selected such that it is different from the prefix code and the existing opcode. The opcode, the escape code, and the prefix code are combined to generate an instruction code which uniquely represents the operation performed by the instruction.

REFERENCES:
patent: 5353420 (1994-10-01), Zaidi
patent: 5572206 (1996-11-01), Miller et al.
patent: 5619666 (1997-04-01), Coon et al.
patent: 5822559 (1998-10-01), Narayan et al.
patent: 5845102 (1998-12-01), Miller et al.
Visual Instruction Set (VIS) User's Guide, Sun Microsystems, Version 1.1, Mar. 1997, pp. i-xii, 1-127.
AMD-3D Technology Manual, Advance Micro Devices, (AMD), Feb. 1998, pp. i-x, 1-58.

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