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Chip protection register lock circuit in a flash memory device

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate

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Chip protection register lock circuit in a flash memory device

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Chipset configured to perform data-directed prefetching

Electrical computers and digital processing systems: memory – Address formation – Hashing
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Chunk-specific executable code for chunked java object heaps

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Circuit and method for address translation, using update and flu

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

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Circuit and method for controlling memory depth

Electrical computers and digital processing systems: memory – Storage accessing and control
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Circuit and method for detecting bank conflicts in accessing...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Circuit and method for executing access control of virtual...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Circuit and method for hardware-assisted software flushing...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Circuit and method for improving instruction fetch time from...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Circuit and method for learning attributes of computer memory

Electrical computers and digital processing systems: memory – Address formation – Address mapping
Patent

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Circuit and method for maintaining order of memory access reques

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Circuit and method for maintaining order of memory access...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Circuit and method for modulo address generation with reduced ci

Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses
Patent

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Circuit and method for monitoring sector transfers to and...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Circuit and method for optimizing creation of a compressed main

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent

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Circuit and method for performing variable width searches in...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Circuit and method for prefetching data for a texture cache

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
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Circuit and method for protecting 1-hot and 2-hot vector...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Circuit and method for protecting 1-hot and 2-hot vector...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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