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Parallel processor synchronization and coherency control...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Parallel processor system including a cache memory subsystem tha

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Parallel processor system including a cache memory subsystem...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Parallel search technique for store operations

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Parallel searching for an instruction at multiple cache levels

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Parameterizable queued memory access system

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Parametric optimization of a disc drive through I/O command...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Parcel cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Parity bit system for a CAM

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Parity generation system for generating new parity using old dat

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Parity-scanning and refresh in dynamic memory devices

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Parity-scanning and refresh in dynamic memory devices

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Parity-scanning and refresh in dynamic memory devices

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Partial block data programming and reading operations in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Partial block data programming and reading operations in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Partial block data programming and reading operations in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Partial block data programming and reading operations in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Partial block data programming and reading operations in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Partial directory cache for reducing probe traffic in...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Partial match partial output cache for computer arithmetic...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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