Parallel search technique for store operations

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Details

C711S140000, C711S154000, C712S216000

Reexamination Certificate

active

07013366

ABSTRACT:
A method and apparatus for satisfying load operations by accessing data from a store buffer is described herein. The present invention further relates to satisfying load operations faster than prior art techniques in most cases. Finally, the present invention provides an improved technique for satisfying load operations that does not significantly impact processor performance.

REFERENCES:
patent: 5694574 (1997-12-01), Abramson et al.
patent: 5724536 (1998-03-01), Abramson et al.
patent: 5751983 (1998-05-01), Abramson et al.
patent: 5778245 (1998-07-01), Papworth et al.
patent: 5881262 (1999-03-01), Abramson et al.

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