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Direct memory move of multiple buffers between logical...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Direct processor cache access within a system having a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Directed allocation of coupling facility structures

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Directed auto-refresh synchronization

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Directory based cache coherency system supporting multiple...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Directory based support for function shipping in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Directory caches, and methods for operation thereof

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Directory for multi-node coherent bus

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Directory structure permitting efficient write-backs in a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Directory tree multinode computer system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Directory-based cache coherency scheme for reducing memory...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Directory-based cache coherency system supporting multiple...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Directory-based coherency system for maintaining coherency in a

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Directory-based coherency system using two bits to maintain cohe

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Directory-based data transfer protocol for multiprocessor...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Directory-based data transfer protocol for multiprocessor...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Directory-based prediction methods and apparatus for...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Directoryless L0 cache for stall reduction

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Dirty data protection for cache memories

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Dirty line cache

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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