Directory tree multinode computer system

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Details

C711S131000, C711S146000

Reexamination Certificate

active

06922755

ABSTRACT:
A multinode, multiprocessor computer system with distributed shared memory has reduced hardware and improved performance by providing a directory free environment. Without a directory, nodes do not track where cache lines are stored in caches on other nodes. In two-node systems, cache lines are implied to be either on the local node or cached at the remote node or both. Thus, if a local node has a cache miss it is implied that the other node in the system has the cache line. In another aspect, the system allows for “silent rollouts.” In prior distributed memory multiprocessor systems, when a remote node has capacity limitations, it must overwrite (i.e., rollout) a cache line and report to the home node that the rollout occurred. However, the described system allows the remote node to rollout a cache line without reporting to the home node that the rollout occurred. Such a silent rollout can create timing problems because the home node still believes the remote node has a shared copy of the cache line. To solve the timing problems and ensure forward progress, if the remote node requests a cache line and receives an invalidate message, it issues a request for an exclusive copy of the cache line. By requesting an exclusive copy, the remote node is guaranteed to obtain the desired cache line and forward progress is achieved.

REFERENCES:
patent: 5588131 (1996-12-01), Borrill
patent: 5590307 (1996-12-01), McClure
patent: 5655102 (1997-08-01), Galles
patent: 5802578 (1998-09-01), Lovett
patent: 5900015 (1999-05-01), Herger et al.
patent: 5900020 (1999-05-01), Safranek et al.
patent: 6041376 (2000-03-01), Gilbert et al.
patent: 6226714 (2001-05-01), Safranek et al.
James Archibald, et al., ACM Transactions on Computer Systems, vol. 4 No. 4, Nov. 1986, “Cache Coherence Protocols: Evaluation Using a Multiprocessor Simulation Model”.
MESI Protocol, at URL: http://www.disi.unige.it/person/DelzannoG/Cache Protocol/mesi.html.
Ivan Tving, Master Thesis DTH ID-E 579., Feb. 2, 1994, Multiprocessor Interconnection Using SCI.

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