Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-05-23
2006-05-23
Chace, Christian P. (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
Reexamination Certificate
active
07051163
ABSTRACT:
A directory maintains status information over memory blocks in a shared memory computer system. The directory has a plurality of entries each corresponding to a respective block, and is organized into a main region and a write-back region. The main region has an owner field, identifying the current owner of the block. The write-back region has a writer field identifying the last owner to have written the block back to memory. To write a block back to memory, the owner enters its identifier in the writer field and writes the data back to memory without checking nor modifying the owner field. In response to a memory operation, if the contents of the owner field and the writer field match, memory concludes that it is the owner, otherwise memory concludes that the entity identified in the owner field is the owner.
REFERENCES:
patent: 4847804 (1989-07-01), Shaffer et al.
patent: 5222224 (1993-06-01), Flynn et al.
patent: 5233616 (1993-08-01), Callander
patent: 5297269 (1994-03-01), Donaldson et al.
patent: 5303362 (1994-04-01), Butts et al.
patent: 5313609 (1994-05-01), Baylor et al.
patent: 5490261 (1996-02-01), Bean et al.
patent: 5530933 (1996-06-01), Frink et al.
patent: 5537575 (1996-07-01), Foley et al.
patent: 5551005 (1996-08-01), Sarangdhar et al.
patent: 5579504 (1996-11-01), Callander et al.
patent: 5608893 (1997-03-01), Slingwine et al.
patent: 5737757 (1998-04-01), Hassoun et al.
patent: 5761731 (1998-06-01), Van Doren et al.
patent: 5905998 (1999-05-01), Ebrahim et al.
patent: 6014690 (2000-01-01), VanDoren et al.
patent: 6055605 (2000-04-01), Sharma et al.
patent: 6061765 (2000-05-01), Van Doren et al.
patent: 6088771 (2000-07-01), Steely, Jr. et al.
patent: 6094686 (2000-07-01), Sharma
patent: 6101420 (2000-08-01), VanDoren et al.
patent: 6105108 (2000-08-01), Steely, Jr. et al.
patent: 6108737 (2000-08-01), Sharma et al.
patent: 6108752 (2000-08-01), VanDoren et al.
patent: 6125429 (2000-09-01), Goodwin et al.
patent: 6154816 (2000-11-01), Steely et al.
patent: 6202126 (2001-03-01), Van Doren et al.
patent: 6249520 (2001-06-01), Steely, Jr. et al.
patent: 2002/0004886 (2002-01-01), Hagersten et al.
patent: 0 817 074 (1998-07-01), None
Gharachorloo, K., Lenoski, D., Laudon, J., Gibbons, P., Gupta, A. and Hennessey, J., Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors, (c) 1990 IEEE, pp. 15-26.
Jouppi, N., Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers, (c) 1990 IEEE, pp. 364-373.
Agarwal, A., Simoni, R., Hennesy, J. and Horowitz, M., An Evaluation of Directory Schemes for Cache Coherence, (c)1988 IEEE, pp. 353-362.
Papapanaroos, M. and Patel, J., A Low-Overhead Coherence Solution for Multiprocessors with Private Cache Memories, (c) 1984 IEEE, pp. 284-290.
UltraSPARC Ultra Port Architecture (UPA): The New-Media System Architecture, http://www.sun.com/processors/whitepapers/wp95-023.html, Copyright 1994-2002 Sun Microsystems, pp. 1-4.
Porting OpenVMS Applications to Intel Itanium Architecture, Compaq Conputer Corporation, Apr. 2002, pp. 1-17.
Adve, S., Hill, M., Miller, B. and Nester, R., Detecting Data Races on Weak Memory Systems,(c) 1991 ACM, pp. 234-243.
Gharachorloo, K., Sharma, M., Steely, S. and Van Doren, S., Architecture and Design of AlphaServer GS320, Nov. 2000, pp. 1-12.
IEEE Standard for Scalable Coherent Interface (SCI), (c) 1993 IEEE, pp. Table of Contents, 30-34 and 141-188.
Scales, D. and Gharachorloo, K., Design and Performance of the Shasta Distributed Shared Memory Protocol, XP-000755264, Jul. 7, 1997, pp. 245-252.
Scales, D., Gharachorloo, K. and Thekkath, C., Shasta: A Low Overhead, Software-Only Approach for Supporting Fine-Grain Shared Memory, XP-002173083, Jan. 10, 1996, pp. 174-185
Scales, D. and Gharachorloo, K., Towards Transparent and Efficient Software Distributed Shared Memory. XP-000771029, Dec. 1997, pp. 157-169.
Scales, D., Gharachorloo, K. and Aggarwal, A., Fine-Grain Software Distributed Shared Memory on SMP Clusters, WRL Research Report 97/3, Feb. 1997, pp. i and 1-28.
Tierney Gregory E.
Van Doren Stephen R.
Chace Christian P.
Hewlett--Packard Development Company, L.P.
LandOfFree
Directory structure permitting efficient write-backs in a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Directory structure permitting efficient write-backs in a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Directory structure permitting efficient write-backs in a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3594855