Dirty data protection for cache memories

Details Dirty data protection for cache memories Dirty data protection for cache memories

2006-06-13

2006-06-13

McLean, Kimberly (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S143000, C711S141000

Reexamination Certificate

active

07062611

ABSTRACT:
A method is described for protecting dirty data in cache memories in a cost-effective manner. When an instruction to write data to a memory location is received, and that memory location is being cached, the data is written to a plurality of cache lines, which are referred to as duplicate cache lines. When the data is written back to memory, one of the duplicate cache lines is read. If the cache line is not corrupt, it is written back to the appropriate memory location and marked available. In one embodiment, if more duplicate cache lines exist, they are invalidated. In another embodiment, the other corresponding cache lines may be read for the highest confidence of reliability, and then marked clean or invalid.

REFERENCES:
patent: 5784548 (1998-07-01), Liong et al.
patent: 5895485 (1999-04-01), Loechel et al.
patent: 6574709 (2003-06-01), Skazinski et al.
Prior art summary in text of information Disclosure Statement transmittal submitted herewith.

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