Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2011-05-31
2011-05-31
Choe, Yong (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S005000, C711S105000, C365S222000
Reexamination Certificate
active
07953921
ABSTRACT:
In a directed auto-refresh (DARF) mode, refresh commands are issued by a controller, and refresh row and bank addresses are maintained internally to a memory module. A bank address counter internal to the memory is initialized to a first predetermined value upon entering DARF mode. The memory refreshes the currently addressed bank in response to a DARF command, and increments the bank address counter in a predetermined sequence. The controller tracks the bank address, and may issue one or more memory access commands while a DARF operation is being performed, if the memory access and the refresh are directed to different banks. Upon exiting a self-refresh mode, the bank address counter assumes a second predetermined value. The second predetermined value may be fixed, or may be n+1, where n is the value of the bank address counter when self-refresh mode is initiated.
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Remaklus, Jr. Perry Willmann
Walker Robert Michael
Choe Yong
Kamarchik Peter M.
Pauley Nicholas J.
Qualcomm Incorporated
Velasco Jonathan T.
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