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Automatic decoding method for mapping and selecting a...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or...
Reexamination Certificate

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Automatic mapping and efficient address translation for...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Dynamic-type storage device
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Autonomous high speed address translation with defect management

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Dynamic-type storage device
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Auxiliary register file accessing technique

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing extended or expanded memory
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Bad-sector search method, data recording device, and program

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Dynamic-type storage device
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Bank conflict avoidance in multi-bank DRAMS with shared...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Bank pointer comparator and address generator for a DVD-ROM syst

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Bank state tracking method and device

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Bank structure storage control device and paper matter...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Block interleaving and deinterleaving method and device therefor

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Broadcast invalidate scheme

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or...
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Cache addressing mechanism that adapts multi-dimensional address

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
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Cache architecture to enable accurate cache sensitivity

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
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Cache bank conflict avoidance and cache collision avoidance

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Cache bank conflict avoidance and cache collision avoidance

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Cache directory addressing scheme for variable cache sizes

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
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Cache index based system address bus

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
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Cache management instructions

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
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Cache memory accessible for continuous data without tag...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
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Cache memory apparatus and central processor, hand-held...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
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