Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
Patent
1997-11-19
1999-12-14
Bragdon, Reginald G.
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
For multiple memory modules
711156, G06F 1200
Patent
active
060031115
ABSTRACT:
A mechanism for tracking the state of a plurality of memory banks in a memory device includes a register which has a plurality of bits, with each bit corresponding to one of the memory banks in the memory device. An open bank circuit has an output coupled to the register and is responsive to both a bank select signal which identifies a first memory bank and an open signal, to set a register bit associated with the first memory bank. A close bank circuit has an output coupled to the register and is responsive to the bank select signal which identifies a second memory bank as well as a close signal to reset the register bit associated with the second memory bank and any banks adjacent to the second memory bank.
REFERENCES:
patent: 5774409 (1998-06-01), Yamazaki et al.
Anderson Andrew V.
Holman Thomas J.
Bragdon Reginald G.
Intel Corporation
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