Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or...
Reexamination Certificate
2007-06-12
2007-06-12
Thai, Tuan V. (Department: 2186)
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
C711S103000, C711S108000, C711S154000
Reexamination Certificate
active
10623474
ABSTRACT:
The invention relates to an automatic decoding method for mapping and selecting a non-volatile memory device having a LPC serial communication interface in the available addressing area on motherboards. A logic structure is incorporated in the memory device, which allows a correct decoding to address the memory to the top of the addressable area or to the bottom of the same area, i.e., in both possible cases. This logic incorporates a non-volatile register whose information is stored in a Content Address Memory to enable the automatic mapping of the memory in the addressable memory area.
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La Malfa Antonino
Poli Salvatore
Schillaci Paolino
Carlson David V.
Jorgenson Lisa K.
Seed IP Law Group PLLC
STMicroelectronics S.r.l.
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